List of updated publications can be found on HAL


[IT22] A. Todri-Sanial, Invited Talk: “Green Computing with Carbon Nanotubes,” FANEM Workshop, June 2018.

[IT21] A. Todri-Sanial, Keynote: “Unsung Heroes of Scaling – Interconnects in the Nanoscale Regime,” IEEE SPI Workshop, May 2018.

[IT20] A. Todri-Sanial, “Progress on BEOL Carbon Nanotube Modeling and Simulation,” CONNECT Workshop, IEEE ESSDERC, September 2017.

[IT19] A. Todri-Sanial, “Power, Heat Reliability: A 3D Physical Design Perspective,” IEEE Design for 3D Silicon Integration Workshop (D43D), Grenoble, France, June 2017.

[IT18] A. Todri-Sanial, “Low-Power VLSI Circuit Modeling and Carbon Nanotube Devices,” at Center for Quantum Devices at the University of Copenhagen, Denmark, June 2017. Sponsored by Program BLATAND. Host: Prof. J. Nygard.

[IT17] A. Todri-Sanial, “Energy Efficient Design: An Outlook on Novel Devices and Memories,” at ARM, Cambridge, UK, November 2016. Host: Dr. S. Das.

[IT16] A. Todri-Sanial, “Energy Efficient Computing: A Quest from Devices to Architectures,” at Cambridge Graphene Center, University of Cambridge, UK, November 2016. Host: Prof. A. C. Ferrari.

[IT15] A. Todri-Sanial, “Carbon Nanotube based Computing”, Journee Scientific du LIRMM, Montpellier, June 2016.

[IT14] A. Todri-Sanial, “Electrothermal Modeling and Analysis of Carbon Nanotube Interconnects,” IEEE PATMOS, Bremen, Germany, September 2016.

[IT13] A. Todri-Sanial, “Modeling and Simulation of Carbon Nanotube Interconnects”, IEEE SISPAD, Nuremberg, Germany, September 2016.

[IT12] A. Todri-Sanial, “3D Integration”, ERII5 Conference, Polytech Montpelier, November 2013 and January 2015.

[IT11] A. Todri-Sanial, “On Carbon Nanotubes as VLSI Interconnects”, CMOS Emerging Technology Research Symposium, CEA, Grenoble, 2014.

[IT10] A. Todri-Sanial, “Design Space Exploration for 3D Integration”, Technical University of Delft, MEST Symposium, 2013.

[IT9] A. Todri-Sanial, “Physical Characterization and Detectability of Resistive-Open Defects in Signal Line TSVs,” invited talk at Journee GDR Thematique “Test and Tolerance of 3D Circuits”, Grenoble, 17 May 2013.

[IT8] A. Todri-Sanial, “Worst-Case Power Supply Noise and Temperature Distribution Analysis for 3D PDNs with Multiple Clock Domains,” IEEE International New Circuits and Systems Conference (NEWCAS), 2013.

[IT7] A. Todri, “Voltage Droop and Thermal Constraints Driven Optimization of 3D Power Delivery Networks,” invited talk at 4th IEEE Design for 3D Silicon Integration Workshop (D43D), June 25-27, Lausanne, Switzerland, 2012.

[IT6] A. Todri, “Power Distribution Studies for Pixels at Fermilab”, presentation given at CMS Trigger and Tracker Week, Power Work Group Meetings, February, 2010.

[IT5] A. Todri, “Testing of DC-DC converters for FPIX”, presentation given at Joint CMS and ATLAS Power Working Group Meetings, March 2010.

[IT4] A. Todri, “FPIX power distribution system”, presentation given at CMS Tracker Power Work Group Meeting, July 2010.

[IT3] A. Todri, “Power network distribution for IC designs and its challenges in deep submicron technologies,” presentation given at Accelerator Physics and Technology Seminars, 2009.

[IT2] A. Todri, “Modeling of the Power Distribution for the CMS Tracker,” presentation given at CMS Upgrade Workshop at Fermilab, 2009.

[IT1] A. Todri, “Modeling of the Power Distribution for the CMS Tracker”, presentation given at CMS Trigger and Tracker, Power Work Group Meeting, November, 2009.

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